News

2020-04-30 - Improved in-house design flow with methodology for accurate simulation of extra large modules.

2019-05-20 - Developed prototype of neurostimulation medical device.

2018-09-01 - Completed design of hard IP for USB-C power management IC.

2017-05-01 - A 40V, 1.5A LDO samples are fully functional with excellent electrical parameters.

2017-02-05 - Taped out corrected Power Driver in X-Fab's XH035 process.

2017-01-31 - Power driver samples were characterized. They are functional with limited high voltage operation.

2016-09-30 - Developed algorithms and a demo for an ambient perception system.

2016-08-31 - Taped out new LDO in X-Fab's XH035 process.

2016-05-31 - Taped out new power driver in X-Fab's XH035 process.

2016-04-30 - Began development of a 40-volt 1.5-amp LDO with reverse current and negative supply protection.

2016-04-30 - Completed concept development of a photosensor array in 65, 40, and 28 nm processes.

2016-02-28 - Started development of a 40-volt 4-amp power driver with supply voltage monitoring.

2015-06-08 - Applied EDAMAME to modeling of SRAM internodal capacitances.

2015-05-07 - Successfully completed proof-of-concept work leading to patent filings for a health monitoring client.

2015-01-15 - Initiated proof-of-concept work for health monitoring client.

2014-10-31 - Analog Solution for Wearables and SMART/SIM CARDS article at ChipStart.

2014-08-15 - Confirmed operation of new buck converter samples in a proprietary process.

2014-06-02 - Design Automation Conference.

2014-04-15 - Completed 3D capacitance modeling project for Microchip.

2014-04-06 - Tapeout of high-voltage power management IP.

2013-12-15 - Established EDAMAME 3D modeling tool.

2013-10-10 - Released analog IP for TSMC 90 nm process.

2013-08-01 - Received samples of improved analog IP in TSMC 90 nm process; initial evaluation indicates all cells are functional.

2013-07-01 - Signed an agreement with ChipStart for promotion of TSMC 90 nm analog IP.

2013-06-12 - Released custom IO and ESD library in the Silterra 130 nm process.

2013-05-16 - Completed demonstration system for sonar distance measurement with VE1210 and VE1212.

2013-03-24 - Verified basic operation of TSMC 90 nm analog cells.

2013-01-25 - Received first silicon of TSMC 90 nm analog cells.

2012-11-15 - Completed evaluation of VE1210 and VE1212 samples, confirming full functionality.

2012-10-17 - Taped-out a library of analog cells for the TSMC 90 nm process.

2012-05-25 - Taped-out two new ICs (VE1210 and VE1212) for sonar-based distance measurement.

2012-01-15 - Began system-level hardware and firmware design services for a family of portable chemical sensors.

2011-10-15 - Completed an evaluation of a wearable electronic system.

2011-09-30 - Released a pad ring design with ESD protection for a 130 nm process with special requirements.

2011-04-25 - Announced the release of the Symica EDA toolkit.

2011-07-15 - Signed a collaboration agreement with Angstrom Design Automation for development of ESD protection.

2011-01-30 - Received silicon for the VE1210 sonar IC and confirmed that it is fully functional.

2010-11-30 - Established a lab setup for semi-automatic measurement and evaluation of the VE1210 sonar IC.

2010-07-31 - Taped-out VE1210, an IC for sonar-based distance measurement.

2010-05-30 - Established an internal design flow.

2010-01-15 - Developed a scalable modular system for a solar plant monitoring system including modules for control, monitoring, and radio communication.

2009-05-14 - Founded the company.